CMOS VLSI LOW-POWER DESIGN: DESIGN METHODOLOGY AND IMPLEMENTATION OF LOW-POWER ASYNCHRONOUS VITERBI DECODERS FOR WIRELES

CMOS VLSI LOW-POWER DESIGN: DESIGN METHODOLOGY AND IMPLEMENTATION OF LOW-POWER ASYNCHRONOUS VITERBI DECODERS FOR WIRELES

by MOHAMED KAWOKGY
  • List Price: $69.00
  • ISBN-10: 3838301285
  • ISBN-13: 9783838301280
  • Edition: N/A
  • Type: Paperback
  • Publisher: LAP Lambert Academic Publishing

About The Book

Power dissipation is a critical parameter in digital design for the implementation of high performance portable, battery operated systems, such as... Read more

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